Call for Papers: Special Issue on Communications for Many-Core Processors and Accelerators
IEEE Transactions on Computers seeks original manuscripts for this upcoming special issue.
 

Communications in various forms have become increasingly important with the advent of diverse computing platforms, such as many-core CPUs, GPUs, FPGAs, machine learning (ML) accelerators, and other domain-specific processors. Meanwhile, data-intensive workloads pose greater challenges to both on-chip and off-chip communications, whereas emerging technologies offer new opportunities for interconnection networks. These trends on architecture, application, and technology require innovative communication designs for the next generation of computing systems. This special issue of IEEE Transactions on Computers will explore academic and industrial research on all topics related to the communication issues in general-purpose and domain-specific processors. Topics of interest to this special issue include, but not limited to:

  • Communication architecture for ML accelerators and other app/domain-specific processors
  • Network interface designs for intra/inter-chip and rack-scale networks
  • Security, reliability, and scalability of communications
  • On-chip network architecture and implementation for CPUs, GPUs, and FPGAs
  • Emerging interconnect technologies, such as optical, wireless, CNT, and 2.5D/3D
  • New design methodologies (including ML-based) for communications
  • Communication modeling/characterization, benchmarking, simulation, and verification
  • Communications at un-core level, e.g., interactions with memory controllers, caches, and storages
  • Communications at large scale (data center, edge, and fog computing)
  • Co-optimizations of communications with OS, compilers, and programming models

Submitted articles must not have been previously published or currently submitted for journal publication elsewhere. Extended versions of published conference papers (to be included as part of the submission together with a summary of differences) are welcome, but they must have at least 40% new impacting technical/scientific material in the submitted journal version, and there should be less than 50% verbatim similarity as reported by a tool (such as CrossRef). Of note, authors are responsible for understanding and adhering to the TC submission guidelines. Papers should be submitted via ScholarOne Manuscripts by selecting the special-issue option. As per TC policies, only full-length papers (at least 12 pages and according to TC submission requirements) can be submitted to this special issue, and each author’s bio should not exceed 150 words.

Important Dates

  • Open for Submissions: August 1, 2020
  • Submission Deadline: August 15, 2020
  • Reviews Completed: October 1, 2020
  • Major Revisions Due: November 1, 2020
  • Reviews of Revisions Completed: November 15, 2020
  • Notification of Final Acceptance: November 22, 2020
  • Publication Materials for Final Manuscripts Due: December 7, 2020
  • Publication: January 2021

Please address all correspondence regarding this special issue to the guest editors:

Lizhong Chen
School of EECS, Oregon State University
chenliz@oregonstate.edu

Zhonghai Lu
KTH Royal Institute of Technology
zhonghai@kth.se

Corresponding Topical Editor

Cristina Silvano
Politecnico di Milano
cristina.silvano@polimi.it

Special Issue on Communications for Many-Core Processors and Accelerators
15 August 2020