The Heterogeneous System Architecture (HSA) Foundation recently added two new HSA Academic Centers of Excellence – Technische Universitaet (TU) Darmstadt, and Friedrich-Alexander-University Erlangen-Nurnberg (FAU), both in Germany.
As mentioned in previous HSA Connections posts, HSA is a standardized platform design that unlocks the performance and power efficiency of the parallel computing engines found in most modern electronic devices. It allows developers to easily and efficiently apply the hardware resources—including CPUs, GPUs, DSPs, FPGAs, fabrics and fixed function accelerators—in today’s complex systems-on-chip (SoCs).
The research these universities are undertaking around HSA could potentially have significant impact for large-scale commercial use, particularly in the data center.
The Embedded Systems and Applications Group (ESA) of TU Darmstadt, for instance, is working with the HSA Foundation to explore how reconfigurable computing (specifically via Field-Programmable Gate Arrays or FPGAs), can be employed in processing units within the HSA framework.
Two key technologies developed by ESA are driving development: The Threadpool Composer system automatically assembles high-performance multi-threaded compute accelerators on FPGAs from existing hardware blocks, providing both pre-built hardware interfaces (e.g., to external memories or the host CPU), as well as software services (e.g., for dispatching compute jobs to the FPGA).
The joint research performed with the HSA Foundation also encompasses major development work on ffLink, a flexible high-performance PCI Express Gen3 x8 interface developed by ESA, which is capable of reaching a transfer rate of more than 7 GB/s between the FPGA accelerator and the host. Both Threadpool Composer and ffLink have been released as open source at https://git.esa.informatik.tu-darmstadt.de.
In the press release, Professor Andreas Koch, who heads the Embedded Systems and Applications Group (ESA) of TU Darmstadt, noted that the collaboration with the HSA Foundation is enabling them to make great progress on research that would have been extremely difficult to tackle without the additional insight provided by the industry partners.
The Department of Computer Science at FAU is currently focusing on integrating image processing accelerators in an FPGA and developing an HSA compliant interface. They are developing a self-designed processor core (packet processor) which is able to process requests and send them back to a host CPU using an HSA interface. The packet processor is then connected to the FAU’s own accelerator core and a PCI Express link to the system’s main memory.
To enable a fast interconnect to the host CPU, FAU is collaborating with TU Darmstadt’s Embedded Systems and Applications Group, which is providing a PCI Express core. FAU is also working on a technical prototype with the HSA Foundation; to support this work AMD, an HSA Foundation member, is providing the host system and technical help for using AMD HSA-enabled APUs, CPUs and GPUs.
The key takeaway from all of this?
FAU Professor Dietmar Fey summed it up nicely: “We’re now able to reach out to many industrial partners and work with them in establishing a standardization for heterogeneous computing platforms. It’s now becoming possible to combine fundamental research from a university with real world industry architectures and applications.”
The two universities are joining Northeastern University in Boston as HSA Academic Centers of Excellence. We’re looking forward to engaging on more projects with other universities worldwide to help make true heterogeneous processing a reality.